MAKEFILE

In the makefile is stored definition how to built/make the project. Makefile is updated automatically by the tool before the make/build command. 

The content of the makefile depends on:
1. files in the project
2. setting of the compiler

The user can view the makefile in the Text editor window. Click on the makefile item by right mouse button in the project manager and select the command "View the makefile" in the popup menu. 

The user can also edit the file in the Text editor window. Click on the makefile item by right mouse button in the project manager window and select the command "Edit the makefile" in the popup menu.

Warning: The makefile may not be created until the first compilation (see commands "main menu | Tools | Make" and "main menu | Tools | Build").

Make/build of the project is supported by the server (use commands from Tools menu in the Main panel to run the compilation). The following third party command-line compilers are supported: 

NSC Assembler for COP8
ByteCraft C

Customizing the makefile

By default the first row in the makefile contains the following option:

#AUTOREGENERATE

It means that the makefile will be updated automatically. If the option is not used, it is necessary to edit the file manually. 
It is not recommended to remove this command unless you are power user. 

Makefile structure 

• Remark: If a line starts with '#' (hash) the line is treated as a remark

• Targets: A line starting with an identifier/filename followed by colon indicates a target.
  Generally, a target has the following form:

  target: [dependency_list]
  <TAB> action_1
  <TAB> action_2
  ...
  <TAB> action_n
  <blank line>
  

  where:

  • target is an identifier/filename.
    
  • dependency_list is a list of filenames.
    The existence and the creation date of these files are checked. If the files are not existing, a make recursively searches for rules on how to create these files. If the files are existing/created and are 'younger' than the target, actions are executed to build a new target. If the dependency list is missing, actions are executed immediately.
  • actions is an executable (commandline).
    Action should be <TAB> -separated from the beginning of the line. The <TAB> is tabulator character. If it starts with the '@' character, no command line copy is performed before the execution. If it starts with the '~' character, this action line is ignored. If you want to have silently ignored actions, put the sequence '@~' at their start.
    If actions are omitted, the default action is searched.
    
    Note: Either dependency_list or actions can be omitted in the target description, but not both of them (!!)

  Example:

  #
  # these are comment lines
  #
  
  # macro definition (Macros are descripted below), 
  this line defines new compiler CC=cc
  
  # this line compile a 'program'
  # target is 'program', dependency_list is 'main.o l1.o l2.o'
  # $(CC) is replaced as 'cc', action is
  # 'cc -o program main.o l1.o l2.o'
  program: main.o l1.o l2.o
      $(CC) -o program main.o l1.0 l2.o
  	
  # target without action
  main.o: main.c l1.h l2.h
  
  # target without dependency_list
  build:
     make clean
     make project.abs
  	
  # delete all *.asm files
  @c:\windows\command.com /C del *.asm
  
  # this action is ignored
  @~ignore this

• default actions - Default action is a rule used if no action is specified. It says how certain targets can be build from files with given extensions. It has the following general form:

  .source_extension.target_extension:
  <TAB> action
  
  where:

  • .source_extension is extension of the files that are sources in the build process
    
  • .target_extension is extension of the files that are build during the action
    
  • action is holds the same as above.

  Example:

  # for source files "*.c" and target files "*.o"
  # is assigned action "cc -c -O $* .c". Macro "$*"
  # is decribed below
  .c.o:
     cc -c -O $* .c
   

• Macros:
  Entries of the form string1 = string2 are macro definitions. string2 is defined as all characters up to a comment character or an unescaped new-line. Such a macro can be used by referencing it anywhere in the action place by writing $(string1).
  
  Example:

  CC=cc -g2
  
  lib.o: lib.c lib.h my.h
     $(CC) lib.c
  

  it is same as:

  lib.o: lib.c lib.h my.h
     cc -g2 lib.c

  Internal macros:
  

  • $$ - The macro $$ is replaced by the single character $
    
  • $* - The macro $* stands for the filename part of the current dependent with the suffix deleted. It is evaluated only for default actions.
    
  • $< - The name of a dependency file, derived as if selected for use with an implicit rule. It is the module that is outdated with respect to the target (the manufactured dependent file name). Thus, in the .c.o rule, the $< macro would evaluate to the .c file. An example for making optimized .o files from .c files is:

    .c.o:
       cc -c -O $* .c
    

    or alternatively:

    .c.o:
       cc -c -O $< 
       

• General rules:
  • - commands may be continued across lines with a backslash-new-line ('\' new-line) sequence. Two backslashes at the end of line are replaced by one.
    Example:

    #Path will be set to "c:\windows\system\"
    SYST=c:\windows\system\\
    
    #Next line will be interpeted as "project.abs: l1.o 12.o"
    project.abs: l1.o\
     12.o

  • Make automatically searches for files to be build according to the dependencies given in the makefile.

Note: It is possible to run only selected tools because of safety precaution.

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